Not Worrying About China

GPS for example

As a result of the capture of Maduro, some people are speculating about this being a provocation that might speed up the timeline of a likely Chinese invasion of Taiwan wrecking American economies.

Off the top of my head.

The CCP is as incapable of running TSMC as Chavez was of running PDVSA. The fragility of the high end chip supply chain is way worse than toilet paper during COVID. Basically if China takes over Taiwan, then we all roll back to IBM and the current capacity of AWS which will degrade over time. A huge hairy deal for AI speculators and self-driving cars, but we are all quite fine with the chips of 2018. Air Traffic Control doesn’t even have that yet. Nor would I imagine, most of the global GPS system.

There are some people here in the states who understand the usefulness of the equivalent of brain-dead reliable AK-47 style technology and design. Remember that Mattel made the gun-stocks for the M16s of the Vietnam era. The US military industrial complex is not all cutting edge. A lot of it could run on iPhones. It’s the logistics and our ability to run decentralized that is our great strength. They may not understand that in the Navy, but they certainly do in the USMC.

RAD750 Single Board Computer

In a conversation with ChatGPT, specific to GPS.

Which GPS satellite “blocks” use mainstream CPUs like Pentium/AMD?

• GPS space vehicles generally do not fly x86 CPUs (Pentium-class or AMD-class) as their primary flight computers. The dominant pattern is to use radiation-hardened processors derived from older commercial designs, plus rad-hard FPGAs/ASICs for signal generation and housekeeping.

• A widely documented example for the GPS Block III satellites is the use of BAE Systems RAD750 single-board computers for onboard processing.

• The RAD750 is PowerPC-based (derived from the PowerPC 750 “G3” lineage), i.e., historically associated with IBM/Motorola-era PowerPC ecosystems, not x86.

Satellite longevity and what that implies for “two-year chip cycles”

• The design life of GPS satellites ranges roughly from 7.5 to 15 years, depending on block and generation.

• Block III satellites are typically described as having a planned ~15-year lifetime.

• That long service life is one reason the space segment prioritizes radiation tolerance, qualification, and stability over chasing leading-edge consumer silicon.

Constellation redundancy: how many spares are “necessary”?

• The GPS constellation is nominally organized into six orbital planes, with at least four satellites per plane in the baseline design.

• Operationally, GPS often runs with more than the 24-satellite baseline (commonly around 31 operational satellites in recent years).

• Receiver-side:

  • A basic 3D position + clock solution classically needs signals from at least 4 satellites (geometry matters), but having more improves accuracy and integrity.

• System-side:

  • Extra satellites function as on-orbit spares and improve coverage/availability when a satellite is unhealthy or being maneuvered/maintained.

“How many nanometers are in the bulk of the fleet?”

You’re basically asking: what process nodes are the flight computers (and key digital electronics) built on?

• For a common space-qualified processor used on modern missions (including GPS Block III per BAE), the RAD750 family is documented as being manufactured at much older nodes than consumer chips:

  • Commonly cited 250 nm, with variants also described around 180 nm and 150 nm depending on generation/implementation.

• So, in “nanometer talk,” a representative answer for a major slice of spaceborne processing is:

  • ~250 nm class (and in some cases ~180/150 nm class) rather than single-digit nanometers.

What I can and can’t say precisely (without classified/proprietary data)

• I can point to documented components (like RAD750 on GPS III) and their documented process nodes.

• I cannot reliably give you a single “nm for the bulk of the GPS fleet” as if every block used one CPU/process, because:

  • Many specific avionics details by block are not published in a clean, complete bill-of-materials format.

  • A GPS satellite is a system of multiple digital subsystems (flight computer, payload electronics, clocks, radios, FPGA/ASIC logic), not one monolithic “chip node.”

If you want, here’s the most direct way to pin this down by block

• Step 1: pick a block (IIR, IIR-M, IIF, III)

• Step 2: identify the primary flight computer family for that block (often rad-hard PowerPC/SPARC/FPGA-based architectures in practice)

• Step 3: map that part family to its qualified process node(s)

If you tell me which block(s) you care about most (for example: “everything still operational before Block III”), I can tighten this into a block-by-block matrix with “known public” vs “not publicly specified,” and keep the claims strictly grounded in sources.